The present invention relates to a semiconductor device and, in particular, to a semiconductor device having a ladder resistor circuit using a polycrystal silicon resistor and to a method of manufacturing such semiconductor device.
Up to now, a ladder resistor circuit using a polycrystal silicon resistor into which n-type impurities are introduced has been widely employed, but in order to obtain a ladder resistor circuit which has small divided voltage output error and high accuracy, the polycrystal silicon resistor of which is lengthened in length has been known.
However, the conventional ladder resistor circuit using the n-type polycrystal silicon resistor suffers from such a problem that an area occupied by the ladder resistor circuit is caused to increase because the circuit uses a means for lengthening length of the resistor for the purpose of reducing the divided voltage output error.
The present invention has an object to provide a ladder resistor circuit which has small divided voltage output error and high accuracy which are not allowed by the conventional ladder resistor circuit using the n-type polycrystal silicon resistor, with a small occupied area.
The main means applied by the semiconductor device according to the present invention in order to achieve the above-mentioned object is as follows.
(1) The impurities introduced into a polycrystal silicon resistor in a ladder resistor circuit using a polycrystal silicon resistor are of p-type.
(2) The p-type impurities introduced into the polycrystal silicon resistor are BF2.
(3) The p-type impurities introduced into the p-type polycrystal silicon resistor are boron.
(4) Two or more kinds of impurities are introduced in the p-type polycrystal silicon resistor.
(5) The structure is characterized in that the film thickness of the p-type polycrystal silicon resistor is from 500 to 1500 xc3x85.
(6) The semiconductor device is characterized in that the sheet resistance of the p-type polycrystal silicon resistor is from 1 kxcexa9/ to 25 kxcexa9/.
(7) The semiconductor device is characterized in that the temperature coefficient of the p-type polycrystal silicon resistor is xe2x88x924000 ppm/xc2x0 C. or lower.
(8) The semiconductor device is characterized in that the length of the p-type polycrystal silicon resistor is from 10 xcexcm to 150 xcexcm.
(9) There is provided a method of manufacturing a semiconductor device, comprising the steps of: forming an oxide film on a semiconductor substrate; forming a polycrystal silicon film of 500 xc3x85 to 1500 xc3x85 in film thickness on the oxide film; doping the polycrystal silicon film region with p-type impurities; forming a region of the polycrystal silicon film by etching the polycrystal silicon film; doping a part of the polycrystal silicon film by 1xc3x971015 to 5xc3x971016 atom/cm2; forming an intermediate insulation film on the oxide film and the polycrystal silicon film; defining contact holes in the polycrystal silicon film and the intermediate insulation film on the semiconductor substrate; and providing metal wirings in the contact holes.
(10) There is provided a method of manufacturing a semiconductor device, comprising the steps of: forming an oxide film on a semiconductor substrate; forming a first polycrystal silicon film on the oxide film; doping the first polycrystal silicon film region with impurities; forming a region of the first polycrystal silicon film by etching the first polycrystal silicon film; forming an insulation film on the surface of the semiconductor substrate including the upper portion of the first polycrystal silicon film region; forming a second polycrystal silicon film of 500 xc3x85 to 1500 xc3x85 in film thickness on the insulation film; doping the second polycrystal silicon film with p-type impurities by 1xc3x971014 to 1xc3x971015 atom/cm2; forming a region of the second polycrystal silicon film by etching the second polycrystal silicon film; doping a part of the region of the second polycrystal silicon film by 1xc3x971015 to 5xc3x971016 atom/cm2; forming an intermediate insulation film on the oxide film and the second polycrystal silicon film; defining contact holes in the first polycrystal silicon film, the second polycrystal silicon film and the intermediate insulation film on the semiconductor substrate; and providing metal wirings in the contact holes.
(11) The structure is characterized in that the insulation film comprises an oxide film of 300 xc3x85 to 1000 xc3x85 in film thickness.
(12) The insulation film comprises a laminated structure comprised of a thermal oxide film of 300 xc3x85 to 700 xc3x85 in film thickness, a nitride film of 200 xc3x85 to 1000 xc3x85 in film thickness and a thermal oxide film of 100 xc3x85 or less in film thickness.
(13) The p-type impurities with which the region of the second polycrystal silicon film is partially doped and the p-type impurities with which a diffused region of a MOS transistor having the p-type diffused region are introduced simultaneously.
(14) A method of manufacturing a semiconductor device, comprising the steps of: forming an oxide film on a semiconductor substrate; forming a first polycrystal silicon film on the oxide film; doping the first polycrystal silicon film region with impurities; forming a region of the first polycrystal silicon film by etching the first polycrystal silicon film; forming an insulation film on the surface of the semiconductor substrate including the upper portion of the first polycrystal silicon film region; forming a second polycrystal silicon film of 500 xc3x85 to 1500 xc3x85 in film thickness on the insulation film; doping the second polycrystal silicon film with p-type impurities by 1xc3x971014 to 1xc3x971015 atom/cm2; forming a region of the second polycrystal silicon film by etching the second polycrystal silicon film; doping the second polycrystal silicon film structuring an n-type polycrystal silicon resistor with n-type impurities by 1xc3x971015 to 5xc3x971016 atom/cm2; doping a part of the region of the second polycrystal silicon film structuring a high resistant element and a capacitor electrode and the second polycrystal silicon film structuring a low resistant element with p-type impurities by 1xc3x971015 to 5xc3x971016 atom/cm2; forming an intermediate insulation film on the insulation film and the second polycrystal silicon film; defining contact holes in the first polycrystal silicon film, the second polycrystal silicon film and the intermediate insulation film on the semiconductor substrate; and providing metal wirings in the contact holes.
(15) The method of manufacturing a semiconductor device is characterized in that the n-type impurities with which the polycrystal silicon film region is doped are phosphorus.
(16) The method of manufacturing a semiconductor device is characterized in that the n-type impurities with which the polycrystal silicon film region is doped are arsenic.
(17) The method of manufacturing a semiconductor device is characterized in that the p-type impurities with which a part of the region of the second polycrystal silicon film structuring the high resistant element and the second polycrystal silicon film structuring the low resistant element are doped and the p-type impurities with which the diffused region of the MOS transistor having the p-type diffused region is doped are introduced simultaneously.
(18) The method of manufacturing a semiconductor device is characterized in that the n-type impurities with which the region of the second polycrystal silicon film structuring the n-type polycrystal silicon resistor and the n-type impurities with which the diffused region of the MOS transistor having the n-type diffused region is doped are introduced simultaneously.